Latest

• PANA: A Fine-Grained Runtime-Adaptive Load Balancing for Parallel SpMV on multicore CPUs
• SoftGuide: A Hardware-Software Co-design Predictor for Data-Dependent Branches
• A Row Decomposition-based Approach for Sparse Matrix Multiplication on GPUs
• Performance optimization method of sparse lower trigonometric equation solver on multi-core CPU architecture
• Accelerating Neural Network Training with Processing-in-Memory GPU
• Sparse matrix storage method, vector calculation method and electronic equipment
• Polyhedral-Based Compilation Framework for In-Memory Neural Network Accelerators
• Regu2D: Accelerating Vectorization of SpMV on Intel Processors through 2D-partitioning and Regular Arrangement
• XB-SIM*: A Simulation Framework for Modeling and Exploration of ReRAM-Based CNN Acceleration Design
• High Performance Simulation of Spiking Neural Network on GPGPUs
• In-Place Irregular Computation for Message-Passing Chip-Multiprocessors